Cellular telephones (also referred to as handsets) and other such mobile wireless telecommunications devices continue to be improved so that they can communicate increasing amounts of data. For example, in the emerging markets of 3G/3.9G, linear transceiver systems, such as those that communicate in accordance with standards such as WCDMA, WiMAX, EUTRAN-LTE, and other non-constant envelope modulation methodologies, the requirement for highly efficient radio frequency (RF) power amplifiers that exhibit good linearity and power control under voltage standing wave ratio (VSWR) mismatch continues to present challenges.
Various types of power amplifiers are known, including single-ended power amplifiers (not shown) and balanced power amplifiers such as that shown in FIG. 1. As illustrated in FIG. 1, a balanced power amplifier 10 comprises a phase splitter 12, an in-phase power amplifier portion 14, an out-of-phase power amplifier portion 16, and a phase combiner 18. As out-of-phase power amplifier portion 16 is typically 90 degrees out of phase with in-phase power amplifier portion 14, in-phase power amplifier portion 14 can also be referred to as the 0° power amplifier portion, and out-of-phase power amplifier portion 16 can also be referred to as the −90° (or +90° in some embodiments) power amplifier portion. A first resistor 20 coupled to ground terminates the out-of-phase input of balanced power amplifier 10, and a second resistor 22 coupled to ground terminates the isolated output port of balanced power amplifier 10. Phase splitter 12 splits the input signal to be amplified (RF_IN) by providing signals at the in-phase (0°) output of phase splitter 12 and the out-of-phase (−90°) output of phase splitter 12 that are equal in amplitude by differ in phase by 90°. In-phase power amplifier portion 14 amplifies the signal it receives from the in-phase output of phase splitter 12. Out-of-phase power amplifier portion 16 amplifies the signal it receives from the out-of-phase output of phase splitter 12. Phase combiner 18 combines these amplified signals. When there is no mismatch between the two signals, the signals are not distorted, and phase combiner 18 produces an output signal (RF_OUT) that represents an equal combination of the two amplified signals. However, when there is mismatch between the two signals, power amplifier portions 14 and 16 experience opposite output phase impedance changes (i.e., one impedance is higher than the other) that partly compensate each other for linearity performance. This compensation helps maintain a constant current in balanced power amplifier 10. In contrast, under mismatch conditions in a single-ended power amplifier (not shown), a constant current would not be maintained.
Power amplifier power control in mobile wireless telecommunication devices typically involves a feedback loop in which the power amplifier output power is detected. The output power detection scheme is one of the key parameters in maintaining power amplifier linearity and linear power control. Conventionally, a number of output power detection schemes have been used, including: forward power detection using a coupler and a detector; implementing a detector at the power amplifier output, such as a collector voltage detector; and current detection using a current mirror.
Forward power detection can readily be implemented, but it is less effective in a high peak-to-average ratio (PAR) linear transmitter system than in other transmitter systems (e.g., a transmitter system in which the power amplifier is operated in saturation) because, for high impedance phases of the load, the voltage at the collector terminal of the amplifying transistor must be significantly increased in order to maintain the same linear output power. Increasing the collector voltage in this manner can promote undesirable signal compression in the power amplifier.
Another type of conventional RF power amplifier control loop detects output power by detecting the voltage at the collector terminal of the amplifying transistor of the power amplifier. Detecting collector voltage can be more preferable than a forward power detection scheme because VSWR matching circuitry that is commonly included can introduce undesirable phase shift. Holding the collector voltage constant in the closed loop can keep the amount of back-off constant for different VSWR mismatch phases. However, this advantage is achieved at the expense of output power. Even though requirements for output power deviation are not as stringent in a linear system as in a non-linear system, unacceptably large power drop can occur under mismatch conditions.
Still another conventional scheme for detecting RF power amplifier output power uses a current mirror. However, a conventional current mirror scheme cannot readily be used in a linear transmitter system because the current drops for the high impedance phases, causing the input power to increase in the closed loop to maintain the power detection signal equal to the reference signal. This leads to further power amplifier signal compression.